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IRIX Base Documentation 1998 November
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IRIX 6.5.2 Base Documentation November 1998.img
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ecstats.z
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ecstats
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Text File
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1998-10-20
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5KB
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133 lines
EEEECCCCSSSSTTTTAAAATTTTSSSS((((1111)))) EEEECCCCSSSSTTTTAAAATTTTSSSS((((1111))))
NNNNAAAAMMMMEEEE
eeeeccccssssttttaaaattttssss - report global event counter activity
SSSSYYYYNNNNOOOOPPPPSSSSIIIISSSS
eeeeccccssssttttaaaattttssss [----aaaaCCCCDDDDeeeeffffrrrr] [interval]
DDDDEEEESSSSCCCCRRRRIIIIPPPPTTTTIIIIOOOONNNN
eeeeccccssssttttaaaattttssss may be used on systems with R10000 processors to interrogate the
global event counters maintained by IRIX using the underlying hardware
event counter mechanisms. The global event counters are maintained on a
system-wide basis, aggregated over all processes and for all user and
system mode execution.
Global event counters are enabled and disabled using the eeeeccccaaaaddddmmmmiiiinnnn(1)
command.
The options to _e_c_s_t_a_t_s are as follows;
----aaaa Report absolute values for the event counters (the complement of
----rrrr).
----CCCC Enable full-screen and continuous update mode. Single character
keystroke commands have the effect of toggling the command line
options, i.e.
aaaa change to reporting absolute counter values
eeee report only the enabled counters
ffff display both enabled and disabled counters
rrrr change to reporting counter rates
qqqq exit
^^^^LLLL redraw the display
----DDDD Enable some diagnostic output, not useful with ----CCCC.
----eeee Display only those event counters that have been enabled - this is
the default.
----ffff Display both enabled and disabled event counters (the complement of
----eeee).
----rrrr Display event rates - this is the default.
New information is reported each _i_n_t_e_r_v_a_l seconds. The default is 5
seconds.
For a particular processor implementation, the number of physical
hardware counters may be smaller than the number of event types that have
counting enabled. When this occurs, the IRIX kernel multiplexes the
physical hardware counters amongst the enabled event counters, and
_e_c_s_t_a_t_s scales up the observed counts to reflect the level of
multiplexing. If this scaling has taken place, the reported counters may
be subject to some statistical sampling errors, and the values are shown
PPPPaaaaggggeeee 1111
EEEECCCCSSSSTTTTAAAATTTTSSSS((((1111)))) EEEECCCCSSSSTTTTAAAATTTTSSSS((((1111))))
with a ``*'' appended.
CCCCAAAAVVVVEEEEAAAATTTT
The underlying hardware event counters are a finite resource, to be
shared amongst multiple competing uses. eeeeccccssssttttaaaattttssss is one such use that
requires the use of eeeeccccaaaaddddmmmmiiiinnnn(1) to enable at least one global event
counter.
Once aaaannnnyyyy global event counters have been enabled with eeeeccccaaaaddddmmmmiiiinnnn(1), then
any future attempts to use either ppppeeeerrrrffffeeeexxxx(1) or the counter-based
SpeedShop profiling tools will be unsuccessful, until aaaallllllll global event
counters are released.
SSSSEEEEEEEE AAAALLLLSSSSOOOO
eeeeccccaaaaddddmmmmiiiinnnn(1), ppppeeeerrrrffffeeeexxxx(1), ppppmmmmiiiinnnnffffoooo(1), ssssppppeeeeeeeeddddsssshhhhoooopppp(1) and rrrr11110000kkkk____ccccoooouuuunnnntttteeeerrrrssss(5).
The specifications for the R10000 event counters may be found at
http://www.sgi.com/MIPS/products/r10k/Perf_Cnt/R10K_PF_Count.doc.html
PPPPaaaaggggeeee 2222